1. Field of the Invention
The invention relates to an electric power converter.
2. Description of the Related Art
There is a conventional electric power converter that includes: a power module including a plurality of power semiconductor devices such as insulated gate bipolar transistors (IGBTs); and a processor unit that controls the operation of the power module. Such an electric power converter is mounted in a vehicle such as an electric vehicle or a hybrid vehicle. The power module of the electric power converter converts direct-current power supplied from a driving electric power source into alternating-current power, and then supplies the alternating-current power to a motor (load).
Specifically, the power module includes: an inverter circuit in which multiple arms, each including power semiconductor devices connected in series, are connected in parallel; and a driver circuit that outputs, to each power semiconductor device, a drive signal (gate on-off signal), which is obtained by amplifying a control signal output from the processor unit based on a control voltage supplied from the outside. Each power semiconductor device is turned on or off based on the drive signal, and thus alternating-current power is supplied from the inverter circuit to the motor.
Recently, some electric power converters include, as a power module, a so-called intelligent power module (IPM) including an abnormality detection circuit that detects abnormalities such as overheating of power semiconductor devices, a short circuit in arms, and a drop in the control voltage supplied (applied) to a driver circuit (see, for example, Japanese Patent Application Publication No. 7-274485 (JP 7-274485 A)). When some sort of abnormality is detected by the abnormality detection circuit of the power module, a processor unit executes a failsafe process such as a process of stopping a motor.
Generally, such a power module is configured to output, for example, an abnormality detection signal (pulse) of which the level becomes instantaneously high when an abnormality is detected, and a latch circuit that latches the abnormality detection signal is disposed between the processor unit and the power module. The processor unit determines whether an abnormality is caused in the power module based on the voltage level of a latch signal output from the latch circuit.
However, with the conventional configuration described above, even when no abnormality is detected by the abnormality detection circuit, if a signal of which the level become instantaneously high is input into the latch circuit due to, for example, the influence of noise, the voltage level of a latch signal output from the latch circuit may be raised to the high level. Thus, there is a possibility that the processor unit will execute a failsafe process such as a process of stopping a motor in spite of the fact that the power module is operating properly.
This phenomenon may occur not only in the configuration in which an abnormality detection signal output from the abnormality detection circuit is input into the latch circuit, but also in the configuration in which an abnormality detection signal is directly input into the processor unit. For example, a failsafe process may be erroneously executed when a signal having the same voltage level as that when an abnormality is detected is erroneously input into the processor unit due to the influence of noise or the like.